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Lehrstuhl für Allgemeine Elektrotechnik und Theoretische Nachrichtentechnik


Prof. Dr.- Ing. Anton Kummert

M.Sc. Lech Kolonko

 

Kontakt

Raum: FE 1.09
Telefon: +49 (0)202 439 1825
E-Mail: kolonko{at}uni-wuppertal.de

 

Publikationen

Referenzen
7.
L. Kolonko; J. Velten; A. Kummert
Optimization of Artificial Port Reflectances for Wave Digital Filters with Topology-Related Delay-Free Loops
2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS) , Seite 170-173.
2020
DOI: 10.1109/MWSCAS48704.2020.9184701

Schlüsselwörter: Wave Digital Filter;Automatic Differentiation;Delay-Free Loop;Multi-Dimensional;Bridged-T Model

Zusammenfassung: In this paper, a generic method for fast determination of all involved optimal artificial port resistances is presented for the realization of Wave Digital Filters (WDFs) containing noncomputable, delay-free loops. Therefore, the concept of Automatic Differentiating WDFs (ADWDFs) is applied to obtain said resistances by minimizing the associated artificial reflectances, which performs significantly faster than empirical approaches, as will be shown in an example. This way, the resulting Wave Digital structure remains completely modular under fixed point iteration schemes achieving optimal convergence speeds. Additionally, contractivity of WDFs is exploited to obtain an optimal operating point from a different perspective.
6.
L. Kolonko; J. Velten; A. Kummert
An Improved Multi-Dimensional Approach to Wave Digital Filters with Topology-Related Delay-Free Loops using Automatic Differentiation
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) , Seite 1163-1166.
August 2019
DOI: 10.1109/MWSCAS.2019.8885341

Schlüsselwörter: Digital filters;Delays;Topology;Linear systems;Mathematical model;Numerical models;Jacobian matrices;Wave Digital Filter;Automatic Differentiation;Delay-Free Loop;Multi-Dimensional;Contractivity;Bridged-T Model
5.
L. Kolonko; J. Velten; A. Kummert
Live Demonstration: A Raspberry Pi Based Video Pipeline for 2-D Wave Digital Filters on Low-Cost FPGA Hardware
2019 IEEE International Symposium on Circuits and Systems (ISCAS) , Seite 1-1.
2019
DOI: 10.1109/ISCAS.2019.8702197

Schlüsselwörter: Field programmable gate arrays;Economic indicators;Liquid crystal displays;Pipeline processing;Digital filters;Hardware;Universal Serial Bus;Wave Digital Filter;Video Pipeline;FPGA;Raspberry Pi
4.
L. Kolonko; J. Velten; A. Kummert
A Raspberry Pi Based Video Pipeline for 2-D Wave Digital Filters on Low-Cost FPGA Hardware
2019 IEEE International Symposium on Circuits and Systems (ISCAS) , Seite 1-5.
2019
DOI: 10.1109/ISCAS.2019.8702369

Schlüsselwörter: Field programmable gate arrays;Streaming media;Pipelines;Economic indicators;Universal Serial Bus;Hardware;Digital filters;Wave Digital Filter;Video Pipeline;FPGA;Raspberry Pi
3.
L. Kolonko; J. Velten; A. Kummert
Word Length Optimization of 2-D Wave Digital Filters with Weighted Quantization Error Variances
2018 IEEE International Symposium on Circuits and Systems (ISCAS) , Seite 1-5.
2018
DOI: 10.1109/ISCAS.2018.8351042

Schlüsselwörter: data compression;image coding;image filtering;optimisation;wave digital filters;weighted quantization error variances;finite word length optimization;shared memory bus width;arbitrary bus widths;2D-WDF;2D wave digital filters;magnitude truncation;image sizes;intuitive unbalanced approach;noise figure 23.0 dB;Quantization (signal);Optimization;Transfer functions;Computational modeling;Digital filters;Wave Digital Filter;Quantization;Magnitude Truncation;Optimization
2.
Jörg Velten; Daniel Wagner; Lech Kolonko; Kathrin Kalischewski; Stephan Tilgner; Tim Schwerdtfeger; Anton Kummert
Examination of direct form vs. WDF realization of a 2-D quadrantal fan filter in FPGA hardware
Multidimensional (nD) Systems (nDS), 2017 10th International Workshop on
September 2017
DOI: 10.1109/NDS.2017.8070614
1.
Lech Kolonko; Jörg Velten; Daniel Wagner; Anton Kummert
FPGA implementation of 2-D wave digital filters for real time motion feature extraction
2017 IEEE International Symposium on Circuits and Systems (ISCAS) , Seite 1-4.
Mai 2017
DOI: 10.1109/iscas.2017.8050936

Schlüsselwörter: 2D spatiotemporal wave digital filter, Clocks, data processing, DDR2-SDRAM-based shift operator, Delays, DRAM chips, feature extraction, field programmable gate arrays, FPGA, FPGA board, Hardware, image filtering, image motion analysis, image sensor, image sensors, low performance computing hardware, nD signal processing application, real time motion feature extraction, Real-time systems, shared bus width, Streaming media, video imaging, video signal processing, Wave Digital Filter, Wave digital filters, WDF arithmetic subsystem
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